• DocumentCode
    2653406
  • Title

    A novel MTJ-based register

  • Author

    Jiang, Yanfeng ; Zhang, Xiaobo ; Ju, Jiaxin

  • Author_Institution
    Microelectron. Center, North China Univ. of Technol., Beijing, China
  • fYear
    2009
  • fDate
    20-23 Oct. 2009
  • Firstpage
    1039
  • Lastpage
    1042
  • Abstract
    A novel register, in which MTJ device is centered, is proposed in this paper. Based on the demand of MTJ´s reading and writing process, some additional devices have been integrated with the MTJ device to compose the actual structure. It has been simulated using Hspice and the simulated result shows that it can be operated as a register in the circuit. Moreover, the layout of the register based on 0.5¿m CMOS process has been finished.1.
  • Keywords
    CMOS integrated circuits; SPICE; integrated circuit layout; integrated circuit modelling; magnetic tunnelling; shift registers; CMOS process; Hspice; MTJ based register; integrated circuit layout; magnetic tunnel junction; reading process; size 0.5 mum; writing process; CMOS technology; Circuit simulation; Clocks; Field programmable gate arrays; Inverters; Microelectronics; Random access memory; Read only memory; Registers; Sequential circuits; MTJ; Register;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    ASIC, 2009. ASICON '09. IEEE 8th International Conference on
  • Conference_Location
    Changsha, Hunan
  • Print_ISBN
    978-1-4244-3868-6
  • Electronic_ISBN
    978-1-4244-3870-9
  • Type

    conf

  • DOI
    10.1109/ASICON.2009.5351509
  • Filename
    5351509