• DocumentCode
    2653432
  • Title

    Structured eIRA codes

  • Author

    Zhang, Yifei ; Ryan, William E. ; Li, Yan

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
  • Volume
    2
  • fYear
    2004
  • fDate
    7-10 Nov. 2004
  • Firstpage
    2005
  • Abstract
    In a recent paper, Yang et at. presented the class of extended irregular repeat-accumulate (eIRA) codes which are efficiently encodable LDPC codes possessing very low error-rate floors and are appropriate for code rates 1/2 or greater. While efficiently encodable, the left-most (n - k)-by-k submatrix of an eIRA code parity-check matrix is random in nature, making efficient decoder implementation problematic. In the present paper, we present structured eIRA codes. We first present some ensemble results for the general class of eIRA codes, after which the subclass of structured eIRA codes is defined. Software and hardware-based performance results for structured eIRA code designs (rates 0.5 to 0.9) are then presented. Results include a 0.5(2048, 1024) code with a BER floor at 10-9 and a 0.8(5120, 4096) code with a BER floor below 10-11.
  • Keywords
    error statistics; matrix algebra; parity check codes; BER; LDPC; extended irregular repeat-accumulate codes; parity-check matrix; Bipartite graph; Bit error rate; Combinatorial mathematics; Decoding; Floors; Geometry; NASA; Parity check codes; Sparse matrices; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signals, Systems and Computers, 2004. Conference Record of the Thirty-Eighth Asilomar Conference on
  • Print_ISBN
    0-7803-8622-1
  • Type

    conf

  • DOI
    10.1109/ACSSC.2004.1399516
  • Filename
    1399516