Title :
An experimental extracted model for latchup analysis in CMOS process
Author :
Li, Ye ; Gong, Xiaohan ; Xu, Weiwei ; Hong, Zhiliang ; Killat, Dirk
Author_Institution :
State Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
Abstract :
The latchup phenomenon is analyzed theoretically. A practical analytical model derived from Ebers-Moll formulations is proposed to analyze, simulate, and predict latchup, with favorable legitimacy and flexibility. The model parameters are extracted on 0.25 um CMOS process from experiments. The extracted model can predict latchup successfully in circuit level when applied in SPICE.
Keywords :
CMOS logic circuits; SPICE; digital circuits; flip-flops; CMOS process; Ebers-Moll formulations; SPICE; latchup analysis; latchup phenomenon; size 0.25 mum; Analytical models; CMOS process; Circuit simulation; MOSFET circuits; Predictive models; SPICE; Semiconductor device modeling; Thyristors; Variable structure systems; Voltage; Coupled BJT model; Ebers-Moll model; latchup; power MOSFET; switching converter; thyristor;
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
DOI :
10.1109/ASICON.2009.5351514
