A pure logic CMOS based low power non-volatile random access memory for RFID application

Author

Yan, Yam ; Wu, Dong ; Liu, Huijuan ; Pan, Liyang ; Xu, Jun

Author_Institution

Inst. of Microelectron., Tsinghua Univ., Beijing, China

fYear

2009

fDate

20-23 Oct. 2009

Firstpage

1015

Lastpage

1018

Abstract

A 1.8V, 0.18 Â¿m pure logic CMOS based low power non-volatile random access memory for RFID application is developed in this paper. Low power consumption is achieved based on a novel two-dimension architecture and a series of power optimization methods. Simulation result shows that the power consumption for read and write operations is less than 160 Â¿W and 560 Â¿W respectively. The merits make it suitable for low power RFID .

Keywords

CMOS memory circuits; low-power electronics; radiofrequency identification; random-access storage; RFID application; logic CMOS; low power nonvolatile random access memory; power 160 muW; power 560 muW; power optimization method; size 0.18 mum; voltage 1.8 V; CMOS logic circuits; Charge pumps; Decoding; Energy consumption; Nonvolatile memory; Radiofrequency identification; Random access memory; Switches; Switching circuits; Voltage; CMOS; Non-volatile random access memory; low power; two-dimension array architecture;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC, 2009. ASICON '09. IEEE 8th International Conference on

Conference_Location

Changsha, Hunan

Print_ISBN

978-1-4244-3868-6

Electronic_ISBN

978-1-4244-3870-9

Type

conf

DOI

10.1109/ASICON.2009.5351520

Filename

5351520