DocumentCode
2654308
Title
Least operation traversal method applied in optimization of logic circuits
Author
Zhang, Huihong ; Wang, Pengjun ; Gu, Xingsheng ; Dai, Jing
Author_Institution
Inst. of Circuits & Syst., Ningbo Univ., Ningbo, China
fYear
2009
fDate
20-23 Oct. 2009
Firstpage
887
Lastpage
890
Abstract
In order to improve the optimization of middle and large-scale logic circuits, a heuristic inspired traversal method of circuit polarities called the least operation traversal method (LOTM) is proposed. Firstly, the polarity traversal sequence problem of fixed-polarity RM circuits is analyzed and a mathematical model of the problem is given and discussed; Secondly, the detailed realization of the LOTM is explained; finally, the method embedded in genetic algorithm is tested by 10 circuits from MCNC Benchmark. The results show that the method can significantly improve the efficiency of genetic algorithm for circuit optimization, especially for circuits with a number of inputs or complex structure.
Keywords
circuit optimisation; genetic algorithms; logic circuits; logic design; circuit polarity; fixed polarity RM circuit; genetic algorithm; heuristic inspired traversal method; least operation traversal method; logic circuit optimization; polarity traversal sequence problem; Algorithm design and analysis; Benchmark testing; Circuit analysis; Circuit optimization; Circuit testing; Genetic algorithms; Large-scale systems; Logic circuits; Mathematical model; Optimization methods; RM logic circuits; heuristic; optimization; traversal method;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location
Changsha, Hunan
Print_ISBN
978-1-4244-3868-6
Electronic_ISBN
978-1-4244-3870-9
Type
conf
DOI
10.1109/ASICON.2009.5351553
Filename
5351553
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