A VHDL SGRAM model for the validation environment of a high performance graphic processor

To validate the functionality of a new highly complex graphics processor described in VHDL, the working environment of the processors has to be modelled. In some cases appropriate models for the external components are commercially available, in other cases these models have to be created. In this paper a general memory model for SGRAMs is presented which had to be implemented to have a flexible simulation environment for a high speed graphics processor at hand. Key features are the generality, the support of SGRAM arrays of various shapes, and functions supporting the simulation process. This functionality goes far beyond the capabilities of currently commercially available SGRAM models