Design of low-power Complementary Pass-Transistor and ternary adder based on multi-valued switch-signal theory

Based on study of previous full adders, this paper proposed a novel ternary full adder (TFA), which are implemented by using switch-level design technology in CPL (complementary pass-transistor logic) structure. Compared with traditional TFA: the circuit structure is simplicity and regulation in symmetry structure; The circuit delay is balanced and the circuit speed is increased and the circuit area is reduced by using switch-level design technology. A new TRCA (ternary ripple carry adder) is designed based on these TFA. The PSPICE simulation results indicate: the novel scheme has correct logic function and the character of clearly low power. It is suitable for high performance and low-power VLSI design.