DocumentCode :
2654597
Title :
Research and implementation of parallel and reconfigurable MICKEY algorithm
Author :
Li Miao ; Xu Jinfu ; Dai Zibin ; Yang Xiaohui ; Qu Hongfei
Author_Institution :
Zhengzhou Inf. Coll., Zhengzhou, China
fYear :
2009
fDate :
20-23 Oct. 2009
Firstpage :
831
Lastpage :
834
Abstract :
A parallel and dynamic reconfigurable hardware architecture of MICKEY algorithm is proposed in this paper, which can satisfy the different characteristics of MICKEY-80, MICKEY-128 and MICKEY-128 2.0 algorithms. The three algorithms are exactly the same in design principle, so according to different reconfigurable parameters, they can be implemented in one chip. As to different parallel methods, detailed comparison and analysis are performed. The design has been realized using Altera´s FPGA. Synthesis, placement and routing of parallel and reconfigurable design have accomplished on 0.18 ¿m CMOS process. The result proves the maximum throughput can achieve 1915.8 Mbps.
Keywords :
parallel algorithms; reconfigurable architectures; ASIC; CMOS process; FPGA; maximum throughput; parallel algorithm; reconfigurable MICKEY algorithm; reconfigurable hardware architecture; Algorithm design and analysis; CMOS process; Field programmable gate arrays; Hardware; Performance analysis; Routing; Throughput; ASIC; FPGA; MICKEY; Parallel; Reconfigurable;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
Type :
conf
DOI :
10.1109/ASICON.2009.5351567
Filename :
5351567
Link To Document :
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