Title :
Effect of Bit Precision on Hardware Complexity for DDFS Architecture
Author :
Perwaiz, Aqib ; Khan, Shoab A.
Abstract :
This paper proposes an analysis of bit resolution versus the hardware complexity of a novel CORDIC (coordinate rotational digital computer) architecture, which acts as DDFS (direct digital frequency synthesizer). The analysis will help us reaching a point which is optimum as far as bit resolution Vs mean square error is concerned. Further more it will conclude that an increase in bit resolution does not really help in reducing the mean square error there fore making hardware more complex is not advise, compactness of hardware is directly proportional to area and power consumption as well.
Keywords :
direct digital synthesis; signal processing; CORDIC; DDFS architecture; bit precision; coordinate rotational digital computer; direct digital frequency synthesizer; hardware complexity; Computer architecture; Control system synthesis; Energy consumption; Frequency conversion; Frequency modulation; Frequency synthesizers; Hardware; Mean square error methods; Signal resolution; Signal synthesis; digital communication; digital down converter; digital receiver; direct digital frequency synthesizer; multirate signal processing;
Conference_Titel :
Advanced Computer Control, 2009. ICACC '09. International Conference on
Conference_Location :
Singapore
Print_ISBN :
978-1-4244-3330-8
DOI :
10.1109/ICACC.2009.70
