Title :
Unified low cost crypto architecture accelerating RSA/SHA-1 for security processor
Author :
Huang, Wei ; You, Kaidi ; Zhang, Suiyu ; Han, Jun ; Zeng, Xiaoyang
Author_Institution :
State-Key Lab. of ASIC & Syst., Fudan Univ., Shanghai, China
Abstract :
This paper proposes a novel unified low cost hardware architecture which can accelerate both RSA and SHA-1. And a scalable and unified crypto function unit is presented to support high performance cryptographic computation in the RISC-like processor. To evaluate the effectiveness of our solution, a low power crypto-processor is proposed to integrate the unified function unit, and the execution time of the 1024 bit RSA is 190 ms and SHA-1 encryption rate reaches 64 Mbps. According to the synthesis results based on SMIC 0.13 um library, the unified crypto function unit can achieve 196 MHz work frequency with the utilization of only 2.6 thousand gates.
Keywords :
cryptography; microprocessor chips; RISC-like processor; RSA; SHA-1; bit rate 64 Mbit/s; crypto architecture; crypto function unit; frequency 196 MHz; low power crypto-processor; security processor; size 0.13 micron; Acceleration; Application specific integrated circuits; Coprocessors; Costs; Cryptographic protocols; Handheld computers; Hardware; High performance computing; Power system security; Public key cryptography; Hash; RSA; Unified hardware; low power security processor; scalable;
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
DOI :
10.1109/ASICON.2009.5351584