A 100 dB CMRR CMOS operational amplifier with single-supply capability

A CMOS operational amplifier that has a 100 dB CMRR (common mode rejection ratio) is described. This is achieved by combining the high output impedance tail current source with control of the drain-source voltage of the input transistors. The common-mode input signal range includes the negative rail voltage. This is obtained by applying the controlled bulk biasing of both input and cascoding transistors. The amplifier consists of two gain stages connected via cascoded current mirrors with voltage gain boost. The suppression of impact ionization current in the output stage improves the gain by more than 20 dB.