A high power efficiency reconfigurable processor for multimedia processing

Nowadays mobile multimedia raise the demand of higher performance, larger amounts of flexibility as well as strict energy constrains. Reconfigurable multimedia array processor (ReMAP) provides architecture with high programmable coarse-grained computational resources and flexible interconnect. To reduce the power consumption of memory access, we present an approach for computing control of the reconfigurable processor. By configuring the operation and settling down the data path of computational resources as initialization, data stream in processor accomplishing algorithm implement without access context memory frequently, which can achieve barely the same energy consumption as ASICs.