DocumentCode :
2655475
Title :
A precise SystemC-AMS model for Charge Pump Phase Lock Loop with multiphase outputs
Author :
Xu, Tao ; Arriëns, Huib Lincklaen ; Van Leuken, Rene ; De Graaf, Alexander
Author_Institution :
Dept. of Microelectron. & Comput. Eng., Delft Univ. of Technol., Delft, Netherlands
fYear :
2009
fDate :
20-23 Oct. 2009
Firstpage :
50
Lastpage :
53
Abstract :
SystemC-AMS as an extension of SystemC provides the essential capability to describe a mix-signal heterogeneous system, so that a virtual-prototype model can be generated to help analyze a whole mix-signal system and further guide the circuit design. This paper presents an example of systemC-ams modeling for a 10 phase 500 MHz charge pump phase lock loop, including digital models like phase/frequency detector and clock N-divider, and analog models like charge pump, low pass filter and voltage controlled oscillator. In order to prove the model´s accuracy, the SPICE simulation result from the corresponding CMOS circuits based on the same structure of these models is used for comparison, and PLL systemC-AMS model is validated1.
Keywords :
CMOS integrated circuits; charge pump circuits; circuit analysis computing; phase locked loops; virtual reality; CMOS circuits; SPICE simulation; charge pump phase lock loop; circuit design; clock N-divider; frequency 500 MHz; low pass filter; mix-signal heterogeneous system; phase-frequency detector; precise SystemC-AMS model; virtual-prototype model; voltage controlled oscillator; Charge pumps; Circuit simulation; Circuit synthesis; Clocks; Low pass filters; Phase detection; Phase frequency detector; SPICE; Semiconductor device modeling; Voltage-controlled oscillators; CMOS; Charge Pump; PLL; SystemC-AMS;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC, 2009. ASICON '09. IEEE 8th International Conference on
Conference_Location :
Changsha, Hunan
Print_ISBN :
978-1-4244-3868-6
Electronic_ISBN :
978-1-4244-3870-9
Type :
conf
DOI :
10.1109/ASICON.2009.5351608
Filename :
5351608
Link To Document :
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