• DocumentCode
    2656196
  • Title

    Superior n-MOSFET performance by optimal stress design

  • Author

    Yang, Y.-J. ; Liao, M.H. ; Liu, C.W. ; Yeh, Lingyen ; Lee, T.L. ; Liang, M.S.

  • Author_Institution
    Nat. Taiwan Univ., Taipei
  • fYear
    2007
  • fDate
    12-14 Dec. 2007
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    In this article we present detailed stress simulation characterization of the 3-D boundary effects and show that the high-performance n FET can be achieved by the ultra-high-stress CESL stressor and optimal geometric structure design. A symmetric structure which results in the biaxial- like stress is favored for n FET in terms of Ion, Bsat rsat, and vnj. The comprehensive study helps the future device circuit design and remains valid for future technology node of 22 nm.
  • Keywords
    MOSFET; geometry; semiconductor device models; stress analysis; device circuit design; n-MOSFET performance; optimal geometric structure design; optimal stress design; stress simulation characterization; ultra high-stress CESL stressor; Compressive stress; Design optimization; Educational institutions; Electron mobility; FETs; MOSFET circuits; Semiconductor device manufacture; Solid modeling; Stress measurement; Tensile stress;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Semiconductor Device Research Symposium, 2007 International
  • Conference_Location
    College Park, MD
  • Print_ISBN
    978-1-4244-1892-3
  • Electronic_ISBN
    978-1-4244-1892-3
  • Type

    conf

  • DOI
    10.1109/ISDRS.2007.4422230
  • Filename
    4422230