• DocumentCode
    2656333
  • Title

    A 51GHz master-slave latch and static frequency divider in 0.18μm SiGe BiCMOS

  • Author

    Rylyakov, Alexander

  • Author_Institution
    T.J. Watson Res. Center, IBM, Yorktown Heights, NY, USA
  • fYear
    2003
  • fDate
    28-30 Sept. 2003
  • Firstpage
    75
  • Lastpage
    77
  • Abstract
    A master-slave latch and companion 1:2, 1:4 and 1:8 static frequency dividers fabricated in 120GHz fT SiGe operate at 51GHz, while drawing 30 mA per latch (780mA total, with input-output buffers) from a -5.2V power supply. At 40Gb/s (40GHz clock) latch operates error-free (BER better than 10-14, 231-1 PRBS) with 152° data-clock phase margin. The directly observed width of the metastability zone of the latch is 1.2ps.
  • Keywords
    BiCMOS integrated circuits; frequency dividers; integrated circuit design; silicon compounds; -5.2 V; 0.18 micron; 120 GHz; 30 mA; 40 GHz; 51 GHz; BiCMOS; SiGe; data-clock phase margin; master-slave latch; metastability zone; static frequency divider; BiCMOS integrated circuits; Frequency conversion; Integrated circuit design; Silicon compounds;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Bipolar/BiCMOS Circuits and Technology Meeting, 2003. Proceedings of the
  • ISSN
    1088-9299
  • Print_ISBN
    0-7803-7800-8
  • Type

    conf

  • DOI
    10.1109/BIPOL.2003.1274939
  • Filename
    1274939
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2656333