DocumentCode
2656405
Title
Challenges in ultra deep submicrometer high performance VLSI circuits
Author
Friedman, Eby G.
fYear
2004
fDate
13-15 Dec. 2004
Firstpage
238
Abstract
Summary form only given. Fundamental trends specific to high speed, high complexity systems are reviewed, emphasizing many of the primary issues that constrain existing and future digital and mixed-signal integrated systems. These issues are discussed in terms of the evolving criteria that affect each aspect of the VLSI design and synthesis process. Attention is placed on distinguishing between local and global issues. Topics such as dual Vt CMOS circuits and on-chip interconnect noise, determined by the local nature of the circuit structures, are compared and contrasted with larger issues that focus on the global nature of VLSI-based systems such as synchronization styles and clock and power distribution networks.
Keywords
CMOS integrated circuits; VLSI; circuit complexity; digital integrated circuits; integrated circuit layout; integrated circuit noise; mixed analogue-digital integrated circuits; synchronisation; CMOS circuits; circuit VLSI synthesis; circuit design; clock; digital integrated circuits; high complexity VLSI; high performance VLSI circuits; high speed VLSI; mixed-signal integrated circuits; on-chip interconnect noise; power distribution networks; synchronization; ultra deep submicrometer VLSI circuits; Clocks; Integrated circuit interconnections; Integrated circuit synthesis; Network-on-a-chip; Power system interconnection; Power systems; Process design; Synchronization; System-on-a-chip; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2004. ICECS 2004. Proceedings of the 2004 11th IEEE International Conference on
Print_ISBN
0-7803-8715-5
Type
conf
DOI
10.1109/ICECS.2004.1399659
Filename
1399659
Link To Document