An encoding technique for design and optimization of combinational logic circuit

A neural representation of combinational logic circuit is proposed, called `Logical Neural Network´ (LNN). LNN is a feed-forward neural network (NN) where the weights of the network indicate the connections of digital circuit. The logic operations of the circuit such as AND, OR, NOR etc are performed with the neurons of LNN. A modification of Simple Genetic Algorithm (mSGA) is applied to design and optimize the LNN for a given truth table. The proposed technique is experimentally studied on four bit parity checker, two bit multiplexer, two bit full adder, full subtractor, and two bit multiplier circuits. LNN is compared with conventional `Cell Array´ method. LNN outperforms the Cell Array method in terms of number of required gates.