Title :
Single poly EEPROM with N-well and stacked MIM capacitor for control gate
Author :
Zhi-Yuan Cui ; Guk-Hwan Kim ; In-Seok Jung ; Byeong-Seong So ; Hyung-Gyoo Lee ; Nam-Soo Kim
Author_Institution :
Chungbuk Nat. Univ., Cheongju
Abstract :
The new structure of EEPROM is proposed for an excellent programming characteristic with a small cell-size. The capacitor of EEPROM is composed of a stacked MIM (Metal-Insulator-Metal) and n-well. A split-type floating gate is connected to these two capacitors in a single poly EEPROM. The TCAD simulation shows that the programming speed is controlled within 10-4 sec. at coupling ratio of 0.75 and control gate voltage of 4 V. We obtain the threshold voltage shifts of 3.2 V between program and erase states.
Keywords :
EPROM; MIM devices; capacitors; N-well stacked MIM capacitor; TCAD simulation; control gate; programming characteristic; single poly EEPROM; split-type floating gate; stacked metal-insulator-metal; voltage 3.2 V; voltage 4 V; CMOS logic circuits; CMOS process; EPROM; Educational institutions; MIM capacitors; Nonvolatile memory; Parasitic capacitance; Silicon compounds; Threshold voltage; Voltage control;
Conference_Titel :
Semiconductor Device Research Symposium, 2007 International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-1892-3
Electronic_ISBN :
978-1-4244-1892-3
DOI :
10.1109/ISDRS.2007.4422274
