Title :
Impact of laterally asymmetric channel and gate stack architecture on device performance of surrounding gate MOSFET (LACGAS SGT): A simulation study
Author :
Kaur, Harsupreet ; Kabra, Sneha ; Haldar, Subhasis ; Gupta, R.S.
Author_Institution :
Univ. of Delhi, Delhi
Abstract :
In the present work, LACGAS SGT that integrates the advantages of both the LAC and stack architecture is proposed and its impact on device characteristics is studied using numerical simulations. Using numerical simulations, the novel features of LACGAS SGT have been studied and compared with CON and LAC devices and it has been shown that LACGAS design leads to enhanced device performance in comparison to CON and LAC devices.
Keywords :
MOSFET; numerical analysis; semiconductor device models; LACGAS SGT; gate stack architecture; laterally asymmetric channel; numerical simulations; surrounding gate MOSFET; Controllability; Educational institutions; High K dielectric materials; High-K gate dielectrics; Lead compounds; Los Angeles Council; MOSFET circuits; Numerical simulation; Semiconductor devices; Transconductance;
Conference_Titel :
Semiconductor Device Research Symposium, 2007 International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-1892-3
Electronic_ISBN :
978-1-4244-1892-3
DOI :
10.1109/ISDRS.2007.4422276
