DocumentCode :
2657028
Title :
An efficient ROM-less direct digital synthesizer based on Bhaskara I´s sine approximation formula
Author :
Nekounamm, Majid ; Eshghi, Mohammad
Author_Institution :
Fac. of Electr. & Comput. Eng., Shahid Beheshti Univ., Tehran, Iran
fYear :
2012
fDate :
21-24 May 2012
Firstpage :
1
Lastpage :
6
Abstract :
In this article a forsaken sine approximation formula by a seventh century Indian mathematician is introduced and by simulation via MATLAB, the formula is then incorporated into a Direct Digital Frequency Synthesizer (DDS or DDFS). An incredible worst case spurious free dynamic range (SFDR) of about 60 dBc is obtained for a typical DDS which comprises a 32-bit accumulator, from which only the 12 MSB´s are used, and no Read Only Memory (ROM). When compared to that of ROM-less parabolic approximation, the proposed system shows a worst case SFDR improvement of at least 30 dBc. A computer simulation also shows that a simplified version of the proposed DDS system with only 5-bit registers could have the same performance as the ROM-less parabolic approximation system with the typical 12-bits registers.
Keywords :
approximation theory; direct digital synthesis; mathematics computing; read-only storage; 12 MSB; Bhaskara I´s sine approximation formula; DDFS; DDS; Matlab; ROM-less parabolic approximation; Read Only Memory; SFDR; computer simulation; efficient ROM-less direct digital frequency synthesizer; forsaken sine approximation formula; registers; seventh century Indian mathematician; spurious free dynamic range; word length 12 bit; word length 32 bit; Clocks; Frequency synthesizers; Linear approximation; Noise; Read only memory; Synthesizers; Bhaskara I; DDS; Direct Digital Synthesis; Sine Approximation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Frequency Control Symposium (FCS), 2012 IEEE International
Conference_Location :
Baltimore, MD
ISSN :
1075-6787
Print_ISBN :
978-1-4577-1821-2
Type :
conf
DOI :
10.1109/FCS.2012.6243580
Filename :
6243580
Link To Document :
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