DocumentCode
2657050
Title
PowerShake: a low power driven clustering and factoring methodology for Boolean expressions
Author
Roy, Sumit ; Arts, Harm ; Banerjee, Prithviraj
Author_Institution
Ambit Design Syst., Santa Clara, CA, USA
fYear
1998
fDate
23-26 Feb 1998
Firstpage
967
Lastpage
968
Abstract
This paper describes algebraic techniques that target low power consumption. A unique power cost function based on decomposed factored form representation of a Boolean expression is introduced to guide the structural transformations. Circuits synthesized by the SIS and POSE consume 54.5% and 10.4% more power than that obtained by our tool respectively
Keywords
Boolean functions; circuit optimisation; combinational circuits; iterative methods; logic CAD; Boolean expressions; PowerShake; algebraic techniques; decomposed factored form representation; power consumption; power cost function; power driven clustering; power driven factoring; structural transformations; Art; Binary trees; Capacitance; Circuit synthesis; Concurrent computing; Contracts; Cost function; Design optimization; Digital circuits; Energy consumption;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe, 1998., Proceedings
Conference_Location
Paris
Print_ISBN
0-8186-8359-7
Type
conf
DOI
10.1109/DATE.1998.655992
Filename
655992
Link To Document