Analysis of a capacitive loaded buck converter

In this paper we study how the capacitive load influences the system dynamics in switched DC/DC converters. A study is made about how the system dynamics depend on the values of the capacitance and ESR. Parallel coupling of capacitors to achieve larger capacitance is studied from a control loop stability point of view. We define a capacitor with a given minimum capacitance and a certain ESR range, which can be paralleled up to a given total maximum capacitance, where the control loop stability margins are guarantied. This result is also extended for a mix of different capacitor types used in parallel.