• DocumentCode
    2657401
  • Title

    A Hardware Efficient LDPC Encoding Scheme for Exploiting Decoder Structure and Resources

  • Author

    Yoon, Chanho ; Oh, Jong-Ee ; Cheong, Minho ; Lee, Sok-Kyu

  • Author_Institution
    Next Generation WLAN Res. Team, Electron. & Telecommun. Res. Inst., Daejeon
  • fYear
    2007
  • fDate
    22-25 April 2007
  • Firstpage
    2445
  • Lastpage
    2449
  • Abstract
    Previously, there has been no report on implementation effort to integrate LDPC encoder and decoder into a single hardware. In this paper, we propose a simple yet low complex systematic LDPC encoding method for class of quasi-cyclic low-density parity-check (QC-LDPC) codes to let LDPC encoder acquire an interchangeable structure, exploited in the decoder. With the proposed encoding scheme, implementation of the proposed encoder becomes much more hardware efficient than having a separate hardware due to LDPC encoder and decoder resource sharing. Moreover, the overall computational complexity of the proposed encoding scheme is lower than the well-known Richardson´s efficient encoding scheme (A.T.J. Richardson and R.L. Urbanke, 2001).
  • Keywords
    decoding; matrix algebra; parity check codes; decoder resource sharing; decoder structure; hardware efficient LDPC encoding scheme; interchangeable structure; quasi-cyclic low-density parity-check codes; Code standards; Computational complexity; Convolutional codes; Decoding; Encoding; Hardware; Parity check codes; Resource management; Turbo codes; Wireless LAN;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Vehicular Technology Conference, 2007. VTC2007-Spring. IEEE 65th
  • Conference_Location
    Dublin
  • ISSN
    1550-2252
  • Print_ISBN
    1-4244-0266-2
  • Type

    conf

  • DOI
    10.1109/VETECS.2007.504
  • Filename
    4212932