DocumentCode
2657441
Title
A compact model for fully overlapped LDD FD SOI MOSFETs
Author
Zhang, Guohe ; Shao, Zhibiao ; Zhou, Kai
Author_Institution
Xi ´´an Jiaotong Univ., Jiaotong
fYear
2007
fDate
12-14 Dec. 2007
Firstpage
1
Lastpage
2
Abstract
The goal of this paper is to propose a simple and efficient physics-based threshold voltage model for short-channel FD SOI MOSFETs with fully-overlapped LDD structures. The model which is based on the solution of the two-dimensional (2D) Poisson´s equation in the thin SOI as well as the gate and buried oxides, has considered the voltage drop in the LDD region by introducing empirical parameters, and has merits of the bulk LDD counterpart.
Keywords
MOSFET; Poisson equation; semiconductor device models; silicon-on-insulator; 2D Poisson equation; buried oxide; fully overlapped LDD FD SOI MOSFET; fully-overlapped LDD structures; gate oxide; physics-based threshold voltage model; short-channel MOSFET; Boundary conditions; Capacitance; Circuit optimization; Educational institutions; Hot carriers; MOSFETs; Poisson equations; Semiconductor films; Silicon on insulator technology; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium, 2007 International
Conference_Location
College Park, MD
Print_ISBN
978-1-4244-1892-3
Electronic_ISBN
978-1-4244-1892-3
Type
conf
DOI
10.1109/ISDRS.2007.4422297
Filename
4422297
Link To Document