A fast division algorithm for VLSI

A novel and fast method for VLSI division is presented. The method is based on Svoboda´s algorithm and uses the radix-2 signed-digit number system to give a divider in which quotient bit selection is a function of the two most significant digits of the current partial remainder. An n-bit divider produces an n-bit quotient in redundant form in 3n gate delays using n(n-1) controlled full add/subtract circuits. Operand pre-scaling necessary for the algorithm is accomplished by a single subtraction