Simplified max-log-MAP decoder structure

Author

Salmela, Perttu ; Järvinen, Tuomas ; Takala, Jarmo

Author_Institution

Tampere Univ. of Technol.

fYear

2006

fDate

24-27 June 2006

Firstpage

10

Lastpage

13

Abstract

Area efficient turbo decoder structures are needed in 3G receivers. Typically, max-log-MAP decoders are used as component decoders. In this paper, it is shown that all the computations of the max-log-MAP algorithm can be carried out with slightly modified add compare select (ACS) units. All the required computations of the max-log-MAP algorithm are analyzed and they are mapped to the proposed ACS units (ACSU). A set of four ACSUs is multiplexed to carry out the computations. With the presented method, the structure of the max-log-MAP decoder is simplified and the computing resources are shared economically

Keywords

3G mobile communication; maximum likelihood decoding; radio receivers; turbo codes; 3G receivers; add compare select units; area efficient turbo decoder structures; component decoders; max-log-MAP decoder structure; Algorithm design and analysis; Code standards; Computer architecture; Decoding; Digital signal processing; Hardware; Signal processing algorithms; Telecommunication computing; Telecommunication standards; Turbo codes;

fLanguage

English

Publisher

ieee

Conference_Titel

Mobile Future, 2006 and the Symposium on Trends in Communications. SympoTIC '06. Joint IST Workshop on

Conference_Location

Bratislava

Print_ISBN

1-4244-0368-5

Type

conf

DOI

10.1109/TIC.2006.1708009

Filename

1708009