DocumentCode
2658816
Title
A design flow for inductively degenerated LNAs
Author
Guermandi, D. ; Franchi, E. ; Gnudi, A.
Author_Institution
DEIS, Bologna Univ., Italy
fYear
2004
fDate
13-15 Dec. 2004
Firstpage
615
Lastpage
618
Abstract
A design flow to explore the design parameters space of integrated inductively-degenerated low noise amplifiers (LNA), under the constraint of matched input impedance, is presented. It is based on standard circuit simulation tools and can be easily automated. The method is applied to the design of a 5.5 GHz 0.18 μm CMOS LNA with minimum noise figure (NF) for a fixed bias current. The measured NF of 2.6 dB, with input reflection coefficient lower than -15 dB at 5 mA bias current, shows good agreement with simulations.
Keywords
CMOS analogue integrated circuits; MMIC amplifiers; impedance matching; integrated circuit design; integrated circuit noise; 0.18 micron; 2.6 dB; 5 mA; 5.5 GHz; CMOS LNA; fixed bias current noise figure; inductively-degenerated low noise amplifiers; input reflection coefficient; integrated LNA design flow; matched input impedance constraints; Analytical models; Circuit simulation; Design optimization; Impedance matching; Inductance; Inductors; Libraries; Low-noise amplifiers; Noise figure; Noise measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics, Circuits and Systems, 2004. ICECS 2004. Proceedings of the 2004 11th IEEE International Conference on
Print_ISBN
0-7803-8715-5
Type
conf
DOI
10.1109/ICECS.2004.1399756
Filename
1399756
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