Title :
Desensitized design of MOS low noise amplifiers by Rn minimization
Author :
Banerjee, Gaurab ; Becher, David T. ; Hung, Celia ; Soumyanath, K. ; Allstot, David J.
Author_Institution :
Intel Corp., Hillsboro, OR, USA
Abstract :
We show that the minimization of device Rn allows us to simultaneously approach noise and input match in CMOS LNA designs in a topology independent fashion. The dependence of Rn on designer specifiable parameters is derived using a theoretical analysis of long channel (i.e square-law) devices. Experimental results are shown to confirm this dependence for short-channel devices. Using experimental data from a 0.18 μm technology, we show that a low Rn design results in a ≥2× increase in the bandwidth over which an optimal noise figure can be obtained. The desensitization of the device with a low Rn provides a greater immunity to impedance mismatches, modeling errors and manufacturing variations.
Keywords :
CMOS analogue integrated circuits; MMIC amplifiers; circuit optimisation; impedance matching; integrated circuit design; integrated circuit noise; 0.18 micron; 3 to 10 GHz; CMOS; MOS LNA design desensitization; device noise resistance minimization; impedance mismatch immunity; long channel square-law devices; low noise amplifiers; noise figure bandwidth; short-channel devices; topology independent noise-input matching; Admittance; CMOS technology; Circuit noise; Equations; Impedance matching; Low-noise amplifiers; Minimization; Noise figure; Topology; Virtual manufacturing;
Conference_Titel :
Electronics, Circuits and Systems, 2004. ICECS 2004. Proceedings of the 2004 11th IEEE International Conference on
Print_ISBN :
0-7803-8715-5
DOI :
10.1109/ICECS.2004.1399757