DocumentCode :
2659275
Title :
Design of a self-testing checker for Borden code
Author :
Piestrak, Stanislaw J.
Author_Institution :
Inst. of Eng. Cybern., Tech. Univ. of Wroclaw, Poland
fYear :
1991
fDate :
14-16 Oct 1991
Firstpage :
582
Lastpage :
585
Abstract :
A Borden code is an optimal code capable of detecting t-unidirectional errors. A new self-testing checker (STC) for Borden code is proposed. It is built of two blocks: a self-testing code-disjoint translator of the Borden code onto the one-out-of-r code (r⩾4) and a well-known STC for the one-out-of- r code. The translator is built of two multi-output threshold circuits and a NOT-AND-OR circuit. The new checker has significantly better performance than the STC for Borden code proposed previously by N. K. Jha (1989). Its highly regular modular structure and easy testability make it particularly attractive for a VLSI implementation
Keywords :
VLSI; built-in self test; error detection codes; integrated circuit testing; logic testing; Borden code; NOT-AND-OR circuit; VLSI implementation; multi-output threshold circuits; one-out-of-r code; self-testing checker; self-testing code-disjoint translator; t-unidirectional errors; testability; Built-in self-test; Circuit faults; Circuit testing; Control systems; Cybernetics; Hardware; Laser modes; Programmable logic arrays; Read only memory; Reliability engineering;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1991. ICCD '91. Proceedings, 1991 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2270-9
Type :
conf
DOI :
10.1109/ICCD.1991.139978
Filename :
139978
Link To Document :
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