Title :
Mismatch compensation in current mirrors with FGMOS transistor
Author :
de la Cruz Alejo, JesÙs ; Moreno, L. Noe Oliva
Author_Institution :
Div. de Maestria en Ing. Mecatronica, TESE, Mexico City, Mexico
Abstract :
This paper presents a technique to solve mismatch compensation problems in current mirrors using the floating gate MOS transistor. To reduce mismatches, the tunneling and injection processes are applied in a 1.2 μm CMOS process. It takes into account the long-term voltage storage as charge on the floating gate of a transistor pMOS. Experimental results justifying these processes are also including. The output current of the current mirror present successful results according to theorical analysis and achieving the mismatch compensation.
Keywords :
CMOS integrated circuits; MOSFET; current mirrors; CMOS process; current mirrors; floating gate MOS transistor; injection process; mismatch compensation; size 1.2 mum; tunneling process; voltage storage; Capacitance; Logic gates; MOSFETs; Mirrors; Nonvolatile memory; Tunneling; Current; floating-gate; injection; mirror; mismatch; tunneling;
Conference_Titel :
Electrical Engineering Computing Science and Automatic Control (CCE), 2010 7th International Conference on
Conference_Location :
Tuxtla Gutierrez
Print_ISBN :
978-1-4244-7312-0
DOI :
10.1109/ICEEE.2010.5608617