Source/drain-extension-last process for incorporating in situ doped lattice-mismatched extension stressor for enhanced performance in SOI N-FET

We report a new source/drain-extension-last (SDE-last) process flow to incorporate in situ doped and lattice-mismatched source/drain (S/D) stressors extremely close to the channel edge for increased strain and reduced series resistance. This process enables the introduction of S/D stressors with much larger than reported lattice-mismatch at the end of the front-end process, thereby minimizing the thermal budget experienced by highly strained heterostructures which could possibly relax strain. For the first demonstration of this concept, an in situ phosphorus- doped silicon-carbon (SiCP) SDE was employed and integrated in a SOI N-FET. A record-high substitutional carbon concentration of 2.1% was used to realize very significant strain effects.