Title :
Binary tree layouts with adequate I/O support
Author :
Tzeng, Nian-Feng ; Bhattacharya, Sourav
Author_Institution :
Center for Adv. Comput. Studies, Southwestern Louisana Univ., Lafayette, LA, USA
Abstract :
The binary tree-based parallel system is suitable for VLSI/WSI implementation due to its simple and regular interconnection pattern among processors. The support of adequate I/O bandwidth in a large parallel system is essential because, otherwise, the system speed gets limited eventually by the I/O operations. In a tree-based system, I/O operations are efficiently carried out through the root and the leaf nodes. A way is presented to systematically generate a tree layout with a sufficient number of leaf nodes on the boundary to support required I/O bandwidth, while maintaining a low area increase and moderate growth in maximum link length. This technique is particularly useful for large-sized binary tree layouts
Keywords :
VLSI; circuit layout CAD; parallel architectures; trees (mathematics); I/O bandwidth; I/O operations; VLSI implementation; WSI implementation; binary tree-based parallel system; large-sized binary tree layouts; regular interconnection pattern; Bandwidth; Binary trees; Clocks; Concurrent computing; Delay systems; Power system interconnection; Read only memory; Research and development; System performance; Very large scale integration;
Conference_Titel :
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location :
New Orleans, LA
DOI :
10.1109/ISCAS.1990.112445
