DocumentCode
2661131
Title
A 28nm high-k metal-gate SRAM with Asynchronous Cross-Couple Read Assist (AC2RA) circuitry achieving 3x reduction on speed variation for single ended arrays
Author
Lee, Robin ; Yang, Jung-Ping ; Huang, Chia-En ; Chiu, Chih-Chieh ; Kao, Wei-Shuo ; Cheng, Hong-Chen ; Liao, Hong-Jen ; Chang, Jonathan
Author_Institution
Memory Develop Project (MDP), Taiwan Semicond. Manuf. Co. (TSMC), Hsinchu, Taiwan
fYear
2012
fDate
13-15 June 2012
Firstpage
64
Lastpage
65
Abstract
Asynchronous Cross-Couple Read Assist (AC2RA) circuitry scheme was invented for single-ended sensing to minimize speed variation in 28nm HKMG process. It improves SRAM array speed variation by 63.3% which is adequate to cover 6σ variation. Access time is also boosted by faster sensing.
Keywords
SRAM chips; asynchronous circuits; high-k dielectric thin films; sensor arrays; AC2RA circuitry; HKMG process; SRAM array speed variation; asynchronous cross-couple read assist circuitry scheme; high-k metal-gate SRAM; single ended sensing arrays; size 28 nm; Discharges (electric); Loading; MOS devices; Partial discharges; Random access memory; Sensors; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits (VLSIC), 2012 Symposium on
Conference_Location
Honolulu, HI
Print_ISBN
978-1-4673-0848-9
Electronic_ISBN
978-1-4673-0845-8
Type
conf
DOI
10.1109/VLSIC.2012.6243791
Filename
6243791
Link To Document