• DocumentCode
    2661186
  • Title

    A greedier detailed router

  • Author

    Chihoub, A. ; Noe, P.S.

  • Author_Institution
    Texas A&M Univ., College Station, TX, USA
  • fYear
    1990
  • fDate
    1-3 May 1990
  • Firstpage
    1644
  • Abstract
    A switchbox/channel routing heuristic called greedier is presented. It is a column-sweep-based heuristic which combines features from existing approaches with new features of its own to generate substantially improved solutions. Tests on switchbox benchmarks show that the heuristic gives very good results in terms of the number of vias, total interconnection length, and CPU time
  • Keywords
    VLSI; circuit layout CAD; integrated circuit technology; CAD; CPU time; VLSI layout design; column-sweep-based heuristic; switchbox/channel routing; total interconnection length; vias number; Artificial intelligence; Benchmark testing; Circuit testing; Cost function; Equations; Integrated circuit interconnections; Routing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1990., IEEE International Symposium on
  • Conference_Location
    New Orleans, LA
  • Type

    conf

  • DOI
    10.1109/ISCAS.1990.112453
  • Filename
    112453
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2661186