Title :
A +30.5 dBm CMOS Doherty power amplifier with reliability enhancement technique
Author :
Onizuka, Kohei ; Saigusa, S. ; Otaka, S.
Author_Institution :
Corp. R&D Center, Toshiba Corp., Kawasaki, Japan
Abstract :
A watt-level, fully integrated 1:1 Doherty power amplifier for 2.4 GHz band is demonstrated in 65 nm CMOS. Both high peak output power of +30.5 dBm and high PAE of 23% at 6 dB power back-off are achieved by the proposed compact output network. A newly introduced reliability enhancement technique for sub-PA prolongs time to failure by up to 75% as well. The PA satisfies IEEE 802.11b and 11g spectrum masks at output power levels of 25.5 and 21.5 dBm respectively, from supply voltage of 3.3 V.
Keywords :
CMOS analogue integrated circuits; UHF amplifiers; UHF integrated circuits; UHF power amplifiers; integrated circuit reliability; CMOS Doherty power amplifier; CMOS process; IEEE 802.11b; IEEE802.11g spectrum masks; compact output network; efficiency 23 percent; frequency 2.4 GHz; reliability enhancement technique; size 65 nm; voltage 3.3 V; watt-level fully integrated 1:1 Doherty power amplifier; CMOS integrated circuits; Impedance matching; OFDM; Power amplifiers; Power generation; Reliability; Slabs;
Conference_Titel :
VLSI Circuits (VLSIC), 2012 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4673-0848-9
Electronic_ISBN :
978-1-4673-0845-8
DOI :
10.1109/VLSIC.2012.6243798
