DocumentCode
2661442
Title
Vertical AND (V-AND) array: High density, high speed, and reliable flash array
Author
Seongjae Cho Han Park ; Jung Hun Lee ; Gil Seong Lee ; Doo-Hyun Kim ; Jang-Gn Yoon ; Yoon Kim
Author_Institution
Seoul Nat. Univ., Seoul
fYear
2007
fDate
12-14 Dec. 2007
Firstpage
1
Lastpage
2
Abstract
This paper proposes a novel V-AND array, and characterizes its memory performances through 3-D simulation. High density AND array is possible due to the vertical channel structure, and the program operation using the DEBI effect removes the program disturbances effectively. By virtue of high density, fast sensing speed, and high reliability, V-AND can be a good candidate for the next generation mass storage flash memories.
Keywords
circuit reliability; circuit simulation; flash memories; logic arrays; 3-D simulation; V-AND array; channel structure; reliable flash array; vertical and array; Charge carrier processes; DSL; Dielectrics; Educational institutions; Flash memory; Gas insulated transmission lines; Isolation technology; SONOS devices; Semiconductor device reliability; Tunneling;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Device Research Symposium, 2007 International
Conference_Location
College Park, MD
Print_ISBN
978-1-4244-1892-3
Electronic_ISBN
978-1-4244-1892-3
Type
conf
DOI
10.1109/ISDRS.2007.4422528
Filename
4422528
Link To Document