Title :
Accurate Modeling of the Delay and Energy Overhead of Dynamic Voltage and Frequency Scaling in Modern Microprocessors
Author :
Sangyoung Park ; Jaehyun Park ; Donghwa Shin ; Yanzhi Wang ; Qing Xie ; Pedram, Massoud ; Naehyuck Chang
Author_Institution :
Seoul Nat. Univ., Seoul, South Korea
Abstract :
Dynamic voltage and frequency scaling (DVFS) has been studied for well over a decade. Nevertheless, existing DVFS transition overhead models suffer from significant inaccuracies; for example, by incorrectly accounting for the effect of DC-DC converters, frequency synthesizers, voltage, and frequency change policies on energy losses incurred during mode transitions. Incorrect and/or inaccurate DVFS transition overhead models prevent one from determining the precise break-even time and thus forfeit some of the energy saving that is ideally achievable. This paper introduces accurate DVFS transition overhead models for both energy consumption and delay. In particular, we redefine the DVFS transition overhead including the underclocking-related losses in a DVFS-enabled microprocessor, additional inductor IR losses, and power losses due to discontinuous-mode DC-DC conversion. We report the transition overheads for a desktop, a mobile and a low-power representative processor. We also present DVFS transition overhead macromodel for use by high-level DVFS schedulers.
Keywords :
DC-DC power convertors; delays; integrated circuit modelling; microprocessor chips; DC-DC converters; DVFS transition overhead macromodel; DVFS-enabled microprocessor; delay overhead; discontinuous-mode DC-DC conversion; dynamic voltage and frequency scaling; energy consumption; energy losses; energy overhead; energy saving; frequency change policies; frequency synthesizers; high-level DVFS schedulers; inductor IR losses; low-power representative processor; power losses; transition overheads; underclocking-related losses; Capacitors; Clocks; Delays; Generators; Inductors; Microprocessors; Phase locked loops; Delay and energy overhead; dynamic voltage and frequency scaling (DVFS); macromodel;
Journal_Title :
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
DOI :
10.1109/TCAD.2012.2235126