DocumentCode :
2661836
Title :
Adaptive multi-pulse program scheme based on tunneling speed classification for next generation multi-bit/cell NAND FLASH
Author :
Cho, Yong Sung ; Park, Il Han ; Yoon, Sang Young ; Lee, Nam Hee ; Joo, Sang Hyun ; Song, Ki-Whan ; Choi, Kihwan ; Han, Jin Man ; Kyung, Kye Hyun ; Jun, Young-Hyun
Author_Institution :
Flash Design Team, Samsung Electron. Co., Ltd., Hwasung, South Korea
fYear :
2012
fDate :
13-15 June 2012
Firstpage :
136
Lastpage :
137
Abstract :
Adaptive multi-pulse program scheme is proposed and evaluated in 21nm 3-bit/cell NAND flash devices. This scheme will be a promising solution to overcome performance degradation of program time accompanied with process technology scaling.
Keywords :
NAND circuits; flash memories; adaptive multi-pulse program scheme; multi-bit/cell NAND flash device; process technology scaling; tunneling speed classification; Arrays; CMOS integrated circuits; CMOS technology; Flash memory; Microprocessors; Tunneling;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits (VLSIC), 2012 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4673-0848-9
Electronic_ISBN :
978-1-4673-0845-8
Type :
conf
DOI :
10.1109/VLSIC.2012.6243827
Filename :
6243827
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2661836
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