Title :
The semiconductor-dielectric interface from PN junction edge and the voltage dependence of leakage reverse current
Author :
Obreja, Vasile V N
Author_Institution :
Nat. R&D Inst. for Microtechnology (IMT-Bucuresti), Bucharest
Abstract :
For commercial silicon PN junctions, significant leakage reverse current at the junction edge has impact on the maximum permissible junction temperature and the maximum working voltage is discussed.
Keywords :
electric potential; elemental semiconductors; leakage currents; p-n junctions; passivation; semiconductor-insulator boundaries; silicon; Si; electrical characteristics; junction temperature; leakage reverse current; passivation process; semiconductor-dielectric interface; silicon PN junction edge; Breakdown voltage; Dielectric devices; Educational institutions; Electric variables; Passivation; Research and development; Semiconductor devices; Semiconductor materials; Silicon devices; Temperature;
Conference_Titel :
Semiconductor Device Research Symposium, 2007 International
Conference_Location :
College Park, MD
Print_ISBN :
978-1-4244-1892-3
Electronic_ISBN :
978-1-4244-1892-3
DOI :
10.1109/ISDRS.2007.4422555
