• DocumentCode
    2661956
  • Title

    A fully-digital phase-locked low dropout regulator in 32nm CMOS

  • Author

    Raychowdhury, Arijit ; Somasekhar, Dinesh ; Tschanz, James ; De, Vivek

  • Author_Institution
    Circuit Res. Lab., Intel, Hillsboro, OR, USA
  • fYear
    2012
  • fDate
    13-15 June 2012
  • Firstpage
    148
  • Lastpage
    149
  • Abstract
    A fully-digital phase-locked low dropout regulator (LDO) has been designed in 32nm CMOS for fine-grained power delivery to multi-Vcc digital circuits. Measurements across a wide range of input voltages and currents exhibit that the LDO offers excellent load regulation and efficiency close to 97% of ideal efficiency at nominal load current conditions (ILOAD=3mA).
  • Keywords
    CMOS digital integrated circuits; digital phase locked loops; voltage regulators; CMOS process; LDO; current 3 mA; fully-digital phase-locked low dropout regulator; load regulation; multivoltage digital circuits; size 32 nm; CMOS integrated circuits; Clocks; Current measurement; Silicon; Voltage control; Voltage measurement; Voltage-controlled oscillators;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits (VLSIC), 2012 Symposium on
  • Conference_Location
    Honolulu, HI
  • Print_ISBN
    978-1-4673-0848-9
  • Electronic_ISBN
    978-1-4673-0845-8
  • Type

    conf

  • DOI
    10.1109/VLSIC.2012.6243833
  • Filename
    6243833
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2661956