DocumentCode :
2662265
Title :
High area-efficient DC-DC converter using Time-Mode Miller Compensation (TMMC)
Author :
Hong, Sung-Wan ; Kong, Tae-Hwang ; Jung, Seungchul ; Lee, Sung-Woo ; Wang, Se-Won ; Im, Jong-Pil ; Cho, Gyu-Hyeong
Author_Institution :
KAIST, Daejeon, South Korea
fYear :
2012
fDate :
13-15 June 2012
Firstpage :
180
Lastpage :
181
Abstract :
For the controller design of a DC-DC converter, a Time-Mode Miller Compensation (TMMC) is introduced in this paper. Using this concept, the consuming area of the DC-DC converter can be significantly reduced without any off-chip compensation components. The chip is implemented in 0.18μm I/O CMOS whose size is similar to 0.35μm CMOS, and the core size of this work is only 0.12mm2. Peak efficiency is 90.6%, with switching frequency of 1.15MHz.
Keywords :
CMOS integrated circuits; DC-DC power convertors; I/O CMOS; TMMC; efficiency 90.6 percent; frequency 1.15 MHz; high area-efficient DC-DC converter; size 0.18 mum; size 0.35 mum; switching frequency; time-mode Miller compensation; CMOS integrated circuits; Capacitors; Radiation detectors; Switches; Transient analysis; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits (VLSIC), 2012 Symposium on
Conference_Location :
Honolulu, HI
Print_ISBN :
978-1-4673-0848-9
Electronic_ISBN :
978-1-4673-0845-8
Type :
conf
DOI :
10.1109/VLSIC.2012.6243849
Filename :
6243849
Link To Document :
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