• DocumentCode
    2662275
  • Title

    Incorporation of a Photonic Layer at the Metallizations Levels of a CMOS Circuit

  • Author

    Fedeli, J.M. ; Migette, M. ; Cioccio, L. ; El Melhaoui, L. ; Orobtchouk, R. ; Seassal, C. ; Rojo-Romeo, P. ; Mandorlo, F. ; Marris-Morini, D. ; Vivien, L.

  • Author_Institution
    LETI, CEA-DRT, Grenoble
  • fYear
    2006
  • fDate
    13-15 Sept. 2006
  • Firstpage
    200
  • Lastpage
    202
  • Abstract
    The integration of a photonic layer on a CMOS circuit can be done either by wafer bonding of an SOI photonic circuit or by low temperature fabrication of a photonic layer at the metallization levels
  • Keywords
    CMOS integrated circuits; integrated circuit metallisation; integrated optoelectronics; optical fabrication; silicon-on-insulator; wafer bonding; CMOS circuit; SOI photonic circuit; Si-SiO2; low temperature fabrication; metallization levels; photonic layer; wafer bonding; Metallization; Optical device fabrication; Optical interconnections; Optical mixing; Optical refraction; Optical waveguides; Photonic integrated circuits; Silicon; Temperature; Wafer bonding;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Group IV Photonics, 2006. 3rd IEEE International Conference on
  • Conference_Location
    Ottawa, Ont.
  • Print_ISBN
    1-4244-0096-1
  • Type

    conf

  • DOI
    10.1109/GROUP4.2006.1708212
  • Filename
    1708212
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2662275