An embedded in-circuit emulator generator for SOC platform

An embedded in-circuit emulator (EICE) is an ICE embedded in the macro-controllers´ core such that the ICE functions can be applied to test the chip after manufacturing. By incorporating the IEEE 1149.1 JTAG facilities, the ICE needs not additional pins. In this paper, we present an EICE generator to create an EICE in Verilog HDL specification that is re-targetable to different user-defined processor an re-configurable to different user-defined EICE functions with better performance and lower cost. For real-time tracing, users can specify which part of program execution to be traced and which part of data memory, and/or which part of the register file to be traced also. For non-real-time tracing, user can be set processor to operate in three modes: run to breakpoint mode, single step mode, run to stop mode. The Verilog program of EICE and the micro-controller are synthesized and mapped to Xilinx´s FPGA for verification or for being used at board developing stage.