Title :
77% power added efficiency surface-mounted bipolar power transistors for low-voltage wireless applications
Author :
Dekker, R. ; Hartskeerl, D.M.H. ; Maas, H.G.R. ; van Rijs, F. ; Slotboom, J.W.
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
Abstract :
To increase the power added efficiency (PAE) and gain (Gp ) of low-voltage RF bipolar power transistors for cellular applications, we present a novel wafer-scale packaging concept based on our silicon-on-anything technology allowing for a strong reduction of device and packaging parasitics. Using this concept, we have achieved a record PAE of 77% and Gp of 14 dB at 0.5 W, 1.8 GHz and 3.5 V supply voltage for an assembled device approaching the theoretical class-AB limit of 78.5%. We also present a 15 V double epi-layer integrated cascode with a gain of 24 dB at 1.8 GHz
Keywords :
cellular radio; low-power electronics; microwave power transistors; power bipolar transistors; semiconductor device packaging; silicon-on-insulator; surface mount technology; telephone sets; 0.5 W; 1.8 GHz; 14 dB; 15 V; 24 dB; 3.5 V; 77 percent; PAE; Si; assembled device; cellular applications; class-AB limit; device parasitics; double epi-layer integrated cascode; low-voltage RF bipolar power transistors; low-voltage wireless applications; packaging parasitics; power added efficiency; silicon-on-anything technology; supply voltage; surface-mounted bipolar power transistors; wafer-scale packaging; Aging; Fabrication; GSM; Glass; Laboratories; Packaging machines; Power amplifiers; Power transistors; Radio frequency; Silicon;
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting, 2000. Proceedings of the 2000
Conference_Location :
Minneapolis, MN
Print_ISBN :
0-7803-6384-1
DOI :
10.1109/BIPOL.2000.886202
