Title :
Parallel image processing field programmable gate array for real time image processing system
Author :
Sugimura, Takeaki ; Shim, JeoungChill ; Kurino, Hiroyuki ; Koyanagi, Mitsumasa
Abstract :
A parallel images processing field programmable gate array (FPGA) for real time image processing system has been proposed to realize high image processing speed and flexibility. This FPGA has a small size configuration memory. In addition, a parallel reconfigurable interconnection network and logic blocks have been used in this FPGA. A test chip was designed and fabricated using 0.35 μm CMOS technology. It was confirmed in the test chip that the reconfiguration of the image processing is successfully performed.
Keywords :
CMOS logic circuits; field programmable gate arrays; image processing; multiprocessor interconnection networks; parallel processing; real-time systems; reconfigurable architectures; 0.35 micron; CMOS technology; FPGA; chip fabrication; configuration memory; field programmable gate array; logic circuits; parallel image processing; parallel reconfigurable interconnection network; real time image processing system; test chip; CMOS logic circuits; CMOS technology; Field programmable gate arrays; Image processing; Multiprocessor interconnection networks; Performance evaluation; Programmable logic arrays; Real time systems; Reconfigurable logic; Testing;
Conference_Titel :
Field-Programmable Technology (FPT), 2003. Proceedings. 2003 IEEE International Conference on
Print_ISBN :
0-7803-8320-6
DOI :
10.1109/FPT.2003.1275779
