• DocumentCode
    2662891
  • Title

    Boolean factoring with kernels and rectangle covering

  • Author

    Berman, C. Leonard ; Maeda, Naotaka ; Malik, Sharad

  • Author_Institution
    IBM Res., Yorktown Heights, NY, USA
  • fYear
    1990
  • fDate
    1-3 May 1990
  • Firstpage
    2646
  • Abstract
    A technique for factoring Boolean expressions which extends standard factorization algorithms by utilizing Boolean and topological information directly during the factorization process is presented. A representation for Boolean functions is introduced, and efficient algorithms for constructing this representation are given. Examples of the techniques are given, and the results of experiments using these methods to factor functions from the MCNC logic synthesis benchmark set are reported. Preliminary experimental results show improvements of up to 20% in literal count compared to MISII algebraic factoring
  • Keywords
    Boolean functions; logic design; network topology; Boolean expressions; Boolean functions; MCNC logic synthesis benchmark set; MISII algebraic factoring; factorization process; kernels; literal count; rectangle covering; standard factorization algorithms; topological information; Automatic logic units; Boolean functions; Circuit synthesis; Design optimization; Kernel; Logic design; Logic functions; Minimization methods; Optimizing compilers; Polynomials;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1990., IEEE International Symposium on
  • Conference_Location
    New Orleans, LA
  • Type

    conf

  • DOI
    10.1109/ISCAS.1990.112552
  • Filename
    112552