Comparing the bitstreams of applications specified in Hardware Join Java and HandelC

Author

Hopf, John

Author_Institution

Adv. Comput. Res. Centre, South Australia Univ., Mawson Lakes, SA, Australia

fYear

2003

fDate

15-17 Dec. 2003

Firstpage

399

Lastpage

402

Abstract

In this paper, we investigate the FPGA bitstreams of applications that have been specified in HandelC and Hardware Join Java. We focus mainly on the FPGA area used. To achieve this we specify an application consisting of a mixture of additions and multiplication operations and synthesise them. The resulting Netlists are place and routed using Xilinx Foundation Tools to determine the number of slices used by both solutions.

Keywords

C language; Java; field programmable gate arrays; hardware description languages; FPGA bitstreams; HandelC; Xilinx foundation tools; addition operation synthesis; hardware join Java; multiplication operation synthesis; Application software; Australia; Computer applications; Field programmable gate arrays; Hardware; High level languages; Java; Lakes; Software development management; Yarn;

fLanguage

English

Publisher

ieee

Conference_Titel

Field-Programmable Technology (FPT), 2003. Proceedings. 2003 IEEE International Conference on

Print_ISBN

0-7803-8320-6

Type

conf

DOI

10.1109/FPT.2003.1275786

Filename

1275786

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2662928