Title :
Augmenting general purpose processors for network processing
Author :
Ghasemi, Hamid Reza ; Mohammadi, Hossein ; Robatmili, Behnam ; Yazdani, Nasser
Author_Institution :
Tehran Univ., Iran
Abstract :
Growth of network line speeds and needs for new services in routers have led to the emergence of new generation of fast and scalable devices for packet processing. A special purpose processor designed for networking, called Network Processor or NP, performs special network processing tasks internally. Network processors must be flexible since the protocols and technology in the field change rapidly. This requires programmability while complicates the design process. Network processors are supposed to work in a speed close to ASIC and with programmability like GPPs. One approach in implementing network processors is augmenting general purpose architectures or instruction sets for network processing. In this paper, we introduce some special instructions and methods for improving general processors to work in network environment. These instructions are designed after studying different processing required in IP networks. We present experimental results to show the improvement achieved by adding these instructions to a modeled GPP. We also present the hardware implementation of these instructions to determine the cost of the real implementation.
Keywords :
instruction sets; network routing; protocols; reduced instruction set computing; ASIC; GPP; application specific integrated circuit; general purpose processor; general purpose processors; instruction sets; network processing; network processor design; network protocols; packet processing; Application specific integrated circuits; Costs; Hardware; Instruction sets; Power transmission lines; Process design; Protocols; Reduced instruction set computing; Streaming media; Web and internet services;
Conference_Titel :
Field-Programmable Technology (FPT), 2003. Proceedings. 2003 IEEE International Conference on
Print_ISBN :
0-7803-8320-6
DOI :
10.1109/FPT.2003.1275791