DocumentCode
2663258
Title
Constant testability for single fault detection in two-dimensional systolic array structures for matrix multiplication
Author
Lombardi, F. ; Sciuto, D. ; Huang, W.-K.
Author_Institution
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
fYear
1990
fDate
1-3 May 1990
Firstpage
2728
Abstract
The authors show that two-dimensional arrays (which are used for matrix multiplication) can be tested with a test set whose cardinality is independent of the array size (C-testability). The proposed approach is based on the computational characteristics of a basic cell in a systolic array. The inner product step is analyzed for three basic configurations of two-dimensional arrays. The approach utilizes a cell-level functional characterization which relates observability and controllability to the processing of each cell. Orthogonal, bilateral, and hexagonal arrays are discussed
Keywords
VLSI; digital arithmetic; integrated circuit testing; multiplying circuits; systolic arrays; C-testability; VLSI; basic cell; bilateral arrays; cardinality; cell-level functional characterization; computational characteristics; controllability; fault analysis; hexagonal arrays; inner product step; matrix multiplication; observability; orthogonal arrays; processing of each cell; single fault detection; test set; three basic configurations; two-dimensional arrays; two-dimensional systolic array structures; Automation; Computer industry; Computer science; Electrical fault detection; Fault detection; Hardware; Manufacturing; Systolic arrays; Testing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1990., IEEE International Symposium on
Conference_Location
New Orleans, LA
Type
conf
DOI
10.1109/ISCAS.1990.112573
Filename
112573
Link To Document