Title :
Voltage island design in multi-core SIMD processors
Author_Institution :
Dept. of Comput. Eng., American Univ. in Dubai, Dubai, United Arab Emirates
Abstract :
Today, power management is a key design objective in chip fabrication. In this paper, we present a novel approach to reduce power consumption in SIMD based multi-core architectures. Voltage scaling technique is used, by implementing voltage islands, to optimize power and performance tradeoff for the cores. The number of islands and their respective voltage are selected based on the power-delay characteristics of each instruction: slow instructions run at the nominal voltage while fast instructions run at a lower voltage to save power. An image compression algorithm is mapped into the hardware to demonstrate the power reduction. The results show energy savings of 2.0X for the specified application.
Keywords :
integrated circuit design; integrated circuit modelling; multiprocessing systems; power aware computing; power consumption; system-on-chip; chip fabrication; image compression algorithm; multi-core SIMD processors; power consumption; power management; power reduction; power-delay characteristics; voltage island design; voltage scaling technique; Arrays; Delay; Inverters; Pixel; Program processors; Switches; System-on-a-chip;
Conference_Titel :
Design and Test Workshop (IDT), 2010 5th International
Conference_Location :
Abu Dhabi
Print_ISBN :
978-1-61284-291-2
Electronic_ISBN :
978-1-61284-290-5
DOI :
10.1109/IDT.2010.5724399
